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AD9695BCPZ-1300
AD9695BCPZ-1300
| Part Number | AD9695BCPZ-1300 |
|---|---|
| Manufacturer | Analog Devices Inc. (ADI) |
| Category | Integrated Circuits (ICs) > Data Acquisition – Analog to Digital Converters (ADC) |
| Description | Dual, 14-Bit, 1300 MSPS high-speed pipeline Analog-to-Digital Converter (ADC) featuring integrated JESD204B digital outputs, multi-band digital downconverters (DDC), and exceptional wideband RF sampling performance. |
| Stock Status | In Stock |
| Origin | Original Factory |
Product Overview
The AD9695BCPZ-1300 is a dual 14-bit monolithic ADC from Analog Devices, sampling up to 1300 MSPS (1.3 GSPS). Optimized for direct RF sampling, wireless base stations and test instruments, it delivers excellent wideband linearity with a 2 GHz analog input bandwidth for direct RF conversion. On-chip integrated DSP blocks include multi-band DDCs, programmable decimation filters and 48-bit NCOs, offloading signal processing workloads of downstream FPGAs/DSPs and simplifying PCB layout. Housed in thermally enhanced LFCSP-64 9×9mm package, it serves as a reliable wideband high-speed digitization core.
Core Advantages
Ultra-Fast Gigasample RF Direct Sampling
1300 MSPS high sampling rate paired with wide analog bandwidth, supporting direct digitization of GHz IF signals to eliminate complex analog downconversion circuits.
Integrated High-Efficiency DDC Signal Filtering
Built-in multi-band digital downconverters with configurable decimation, realizing on-chip channel filtering and frequency shifting to reduce system data throughput.
High-Speed Serial JESD204B Interface Layout
Configurable Subclass 1 JESD204B multi-lane serial interface reduces PCB routing space and ensures deterministic multi-chip synchronous clocking.
Outstanding Dynamic Spectral Performance Matrix
Industry-leading SFDR and SNR performance enables clear extraction of weak target signals under dense high-frequency interference environments.
Key Specifications
| Brand | Analog Devices Inc. (ADI) |
|---|---|
| RoHS Status | RoHS Compliant / Lead-Free Standard (Green Material Package) |
| EDA/CAD Model | 3D Model & PCB Footprint Available upon request |
| Warranty | 1-Year Standard Factory Warranty |
| Package / Case | LFCSP-64 (9.00mm x 9.00mm) |
| Mounting Type | Surface Mount Technology (SMD/SMT) |
| Surface Marking / Silkscreen | AD9695BCPZ-1300 Marking |
| ADC Architecture & Channels | Dual-Channel, 14-Bit Resolution Pipelined Data Conversion Subsystem |
| Maximum Clock Sample Speed | 1300 MSPS (1.3 GSPS) |
| Analog Input Bandwidth (-3dB) | Up to 2.0 GHz Full Power Input Bandwidth |
| Digital Serialization Format | JESD204B (Subclass 1) High-Speed Serial Digital Output Lanes |
| Digital Signal Processing Block | Integrated 4x Independent Digital Downconverters (DDCs) with 48-Bit Complex NCOs |
| Analog Voltage Rails | Dual Supply Infrastructure: 0.95V and 1.9V Analog Supplies |
| Digital Supply Core Rails | 1.2V and 2.5V Low-Power Logic Interfacing Operations |
| Operating Temperature Range | -40°C to +85°C Industrial Grade |
| Full-Scale Analog Input Range | 1.36 V p-p / 1.59 V p-p / 2.04 V p-p Selectable Differential Input Swing |
| Signal-to-Noise Ratio (SNR) | 65.6 dBFS Typical at $f_{IN}=172\ \text{MHz}, 1.59\ \text{V p-p}$ |
| Spurious-Free Dynamic Range (SFDR) | 78 dBFS Typical at $f_{IN}=172.3\ \text{MHz}, 1.59\ \text{V p-p}$ |
| Total Power Consumption @1300 MSPS | 1.6 W Total Power (800 mW Per Single ADC Channel) |
| Max JESD204B Serial Lane Rate | Up to 16 Gbps Per Serial Lane |
| Internal Voltage Reference | Integrated Precision On-Chip 1.0 V Reference |
Typical Applications
- Wireless Communication Basestations, Multi-Carrier Macro Cell Infrastructure, and 5G MIMO Radio Arrays
- Advanced Electronic Warfare Systems, Military Phased-Array Radar Receivers, and Jamming Nodes
- High-End Automated Test and Measurement Equipments, Ultra-Wideband Oscilloscopes, and Spectrum Analyzers
- Satellite Earth Communications Stations, Remote Telemetry Equipment, and Wideband Radio Links
- Nuclear Magnetic Resonance (NMR) Imaging Technology and Specialized Scientific Research Instrumentation
Order & Shipping Info
| Minimum Order Quantity (MOQ) | 1 Piece |
|---|---|
| Shipping Time | Shipped within 1-2 business days |
| Delivery Time | 3-7 working days worldwide |
| Shipping Methods | DHL, UPS, FedEx, EMS |
| Payment Methods | T/T (Bank Transfer), PayPal, Credit Card, Western Union |
Technical Support
For datasheet, sample requests, stock check, or bulk pricing, please use the Quick Inquiry form. We will reply within 24 hours.
Frequently Asked Questions
Q1: Is your currently available stock of the AD9695BCPZ-1300 component fully original and authentic?
A: Yes, we guarantee that all AD9695BCPZ-1300 ultra-high-speed ADC chips in our stock are 100% brand-new, factory-original products from Analog Devices Inc., kept inside temperature-controlled and anti-static ESD shielding pipelines.
Q2: How do the built-in Digital Downconverters (DDCs) optimize overall power usage?
A: On-chip DDCs complete filtering, frequency shifting and decimation locally, filtering out useless spectrum and lowering output data rate. It reduces the required JESD204B lanes and operating speed, cutting power consumption of both ADC and FPGA host interface.
Q3: What unique system timing capabilities does the JESD204B Subclass 1 protocol offer?
A: JESD204B Subclass 1 uses SYSREF hardware timing signal to achieve fixed deterministic latency across multiple converters, supporting precise synchronization of multi-chip phased array antenna systems.
Q4: How can our engineering development group request reference layout schematics, register map calculators, or ask for tiered volume discount quotes?
A: Fill out the Quick Inquiry form on this page with your project parameters. Our technical support team will send full technical documents and tiered pricing within 24 hours.
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