HI3516DRBCV100
| Part Number | HI3516DRBCV100 |
|---|---|
| Manufacturer | HiSilicon |
| Product Category | Integrated Circuits > Embedded Multimedia SoC / IP Camera Processor |
| Description | HD Intelligent IP Camera SoC, Dual-Core ARM Cortex-A7 @900MHz, H.264/H.265 Hardware Codec, 1.0TOPS NNIE AI Engine, Next-Generation ISP, TFBGA367 Package, Commercial Grade -20℃~+70℃ |
| Stock Status | In Stock |
| Origin | Original Factory |
Product Overview
HI3516DRBCV100 is HiSilicon’s dual-core Cortex-A7 intelligent IPC SoC. Integrated H.264/H.265 hardware encoder, 1.0TOPS NNIE AI engine and full-function ISP, it supports multi-stream encoding and intelligent algorithm acceleration for security surveillance cameras.
Core Advantages
Powerful AI Computing Performance
Built-in NNIE engine with peak 1.0TOPS computing power, supports face detection, human body detection, behavior analysis and other intelligent algorithms.
High Efficiency Video Codec
Native H.265/H.264 hardware encoding, max 50Mbps bitrate, multi-stream simultaneous encoding to reduce storage and bandwidth cost.
Full-Function ISP Image Processing
Integrated 3A auto adjustment, WDR, fog removal, distortion correction and 6-DOF anti-shake, stable imaging under complex light environment.
Complete Hardware Security Mechanism
Support secure boot, hardware AES/SHA/RSA encryption acceleration, 8Kbit OTP one-time programmable memory, memory isolation protection.
Key Specifications
| Brand Series | HiSilicon iLumin Series |
|---|---|
| RoHS Compliance | RoHS Compliant / Lead-Free |
| EDA CAD Resources | Schematic symbols, PCB footprint, 3D component models available on request |
| Quality Warranty | 1-Year Standard Factory Warranty |
| Package / Case | TFBGA-367 (14mm × 14mm, ball pitch 0.65mm) |
| Mounting Type | SMT Surface Mount |
| Surface Marking / Silkscreen | Hi3516DRBCV100 Marking |
| CPU Core | Dual-Core ARM Cortex-A7 @ 900MHz; 32KB I/D-Cache + 256KB L2 Cache, NEON/FPU supported |
| Max Encoding Resolution | 2688 × 1536 @30fps, multi-stream combination supported |
| Max Decoding Resolution | 3072 × 1728; Only decode self-encoded stream; JPEG max 16M@10fps |
| Video Codec | H.265 Main Profile, H.264 BP/MP/HP, JPEG Baseline |
| AI Computing Power | Built-in NNIE engine, peak 1.0 TOPS |
| ISP Function | 3A AE/AWB/AF, 2F WDR, fog removal, distortion correction, 6-DOF anti-shake; max input 2688×1944 |
| Storage Interface | SPI Nor/Nand Flash(max 1GB), eMMC 4.5 (4bit); Max external DDR capacity 1GB |
| Peripheral Interfaces | 1×10/100 Ethernet MAC, USB2.0 Host/Device, SDIO3.0, SPI, I2C, UART, Audio Codec |
| Working Voltage | Core:0.9V, IO:3.3V, DDR:1.5V/1.35V/1.2V adaptive |
| Operating Temperature | -20°C ~ +70°C (Commercial Grade) |
| Security Module | Secure boot, AES/SHA/RSA hardware accelerator, 8Kbit OTP, memory isolation |
| Development SDK | Linux 4.9 SDK, contains codec library & ISP tuning tools |
Typical Applications
- 4MP HD Network IP Surveillance Camera
- Smart Home Video Doorbell & Baby Monitor
- Industrial Edge Vision Detection Equipment
- Traffic License Plate Recognition Camera
- Commercial Building Face Access Control Terminal
Order & Shipping Information
| Minimum Order Quantity | 1 Piece |
|---|---|
| Processing Time | Ship within 1-2 working days after payment |
| Global Delivery Time | 3-7 working days |
| Shipping Carrier | DHL, UPS, FedEx, EMS |
| Available Payment | T/T Wire Transfer, PayPal, Credit Card, Western Union |
Technical Support
Please submit inquiry form to get datasheets, sample quotation, stock check and bulk price. We will reply within 24 hours.
Frequently Asked Questions
Q1: What is the correct package of HI3516DRBCV100?
A1: Standard TFBGA367, 14×14mm with 0.65mm ball pitch. TFBGA196 is wrong parameter for old CV series chip.
Q2: What is the main frequency of this SoC?
A2: Dual Cortex-A7 runs at 900MHz, not 800MHz.
Q3: What AI algorithm can NNIE engine support?
A3: Human detection, face capture, object tracking, perimeter intrusion analysis and other common security algorithms.
Q4: What is the maximum external DDR memory capacity?
A4: Support maximum 1GB external DDR3/DDR3L memory.
Q5: Can this chip decode external video stream files?
A5: No, it only supports decoding video stream encoded by itself.
Q6: Are the components original new stock?
A6: All parts are brand new original HiSilicon factory sealed, complete batch traceability.
Q7: Can I get engineering samples for testing?
A7: Small sample orders are acceptable, contact us via inquiry for sample price.
Q8: What Linux system does the official SDK adapt to?
A8: Matched Linux 4.9 version SDK, complete ISP tuning and codec tool chain.
Q9: What is the delivery lead time for mass order?
A9: In-stock items ship within 1-2 working days; bulk large orders take 7-15 days to arrange.
Q10: What is the warranty period for this chip?
A10: We provide 1-year standard factory quality warranty for all original components.
Q11: Is this chip suitable for outdoor monitoring equipment?
A11: Yes, commercial grade temperature range -20℃ ~ +70℃ fits most indoor and outdoor IPC devices.
Q12: Can I download the full datasheet directly on this page?
A12: Please submit your inquiry form, we will send complete datasheet and technical document to your email for free.

